[Bug rtl-optimization/83565] RTL combine pass breaks shift result (at least on ia64)

[wilson at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83565

--- Comment #16 from Jim Wilson <wilson at gcc dot gnu.org> ---
That referred patch was written by Eric Botcazou for PR59461 which is for
SPARC, which operates same as Itanium, the upper 32-bits of a 32-bit value in a
64-bit reg are undefined.  So it does not appear to be correct for SPARC
either.  Hence it appears that we need the same change for SPARC, and that
breaks the fix for PR59461.  I think we need to revisit that.  If you have a
paradoxical subreg of a reg, then it is only OK to use LOAD_EXTEND_OP if you
know the value in the reg came from a memory location.  This check is missing.

If we are going to change the meaning of WORD_REGISTER_OPERATIONS, then we need
a change to the docs also.  But I'm not convinced that this needs to change.