[Bug rtl-optimization/80491] [6/7/8 Regression] Compiler regression for long-add case.

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80491

--- Comment #7 from Segher Boessenkool <segher at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #6)
> Segher, any idea what can be done about the second (combiner) issue?
> Is it possible to special case MODE_CC class hard registers that are just
> clobbered on the i2 insn using a separate clobber in a parallel (so the
> single_set in that case which is what we try to substitute doesn't clobber
> it)
> and not in insns in between i1 and i2 and i2 and i3?

Should we bail out at all here?  Why would we care if the original insns
clobbered some reg; what matters is if the insns combine comes up with do?

This is even true for SETs instead of CLOBBERs, if the SET isn't needed.