[Bug middle-end/80283] [5/6/7 Regression] bad SIMD register allocation

[wilco at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80283

--- Comment #13 from wilco at gcc dot gnu.org ---
It looks the x64 issue is unrelated. It starts with a bad schedule which could
be improved by the scheduler but that is off by default, while the ARM version
starts with a good schedule which is completely messed up by the scheduler.