[Bug middle-end/80283] [5/6/7 Regression] bad SIMD register allocation

[already5chosen at yahoo dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80283

--- Comment #11 from Michael_S <already5chosen at yahoo dot com> ---
Created attachment 41128
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41128&action=edit
ARMv7 case

ARMv7 - very similar to x64