[Bug middle-end/80283] [5/6/7 Regression] bad SIMD register allocation
bernds at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Tue Apr 4 18:37:00 GMT 2017
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80283
--- Comment #9 from Bernd Schmidt <bernds at gcc dot gnu.org> ---
Cou(In reply to Michael_S from comment #8)
> Here is a variant that makes an issue to show on x64 with -fno-tree-ter.
> https://godbolt.org/g/mSLiRZ
Could you attach this here as well? I've been trying to get the testcase out of
godbolt, but there seems not to be a save option and copy & paste doesn't work
either.
In general, the problem is that ter makes pessimal scheduling decisions,
increasing register pressure. The patch I have adds a little mini-scheduler
into the expand stage to try to prevent this. In theory that should also work
for testcases where the bad scheduling was done manually, but I'd like to
check.
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