[Bug target/71847] powerpc64le: Potential rlwinm optimisation

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71847

--- Comment #2 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Author: segher
Date: Fri Oct 28 20:56:28 2016
New Revision: 241664

URL: https://gcc.gnu.org/viewcvs?rev=241664&root=gcc&view=rev
Log:
combine: Improve change_zero_ext (fixes PR71847)

This improves a few things in change_zero_ext.  Firstly, it should use
the passed in pattern in recog_for_combine, not the pattern of the insn
(they are not the same if the whole pattern was replaced).  Secondly,
it handled zero_ext of a subreg, but with hard registers we do not get
a subreg, instead the mode of the reg is changed.  So this handles that.
Thirdly, after changing a zero_ext to an AND, the resulting RTL may become
non-canonical, like (ior (ashift ..) (and ..)); the AND should be first,
it is commutative.  And lastly, zero_extract as a set_dest wasn't handled
at all, but now it is.

This fixes the testcase in PR71847, and improves code generation in some
other edge cases too.


        PR target/71847
        * combine.c (change_zero_ext): Handle zero_ext of hard registers.
        Swap commutative operands in new RTL if needed.  Handle zero_ext
        in the set_dest.
        (recog_for_combine): Pass *pnewpat to change_zero_ext instead of
        PATTERN (insn).

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/combine.c