[Bug target/78458] [7 Regression] LRA ICE building libgcc for powerpc-linux-gnuspe e500v2

[joseph at codesourcery dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78458

--- Comment #11 from joseph at codesourcery dot com <joseph at codesourcery dot com> ---
For e500v2, that patch moves things from a libgcc build failure to a glibc 
build failure having built libgcc successfully: many files in glibc fail 
to build with errors of the form:

../sysdeps/ieee754/ldbl-128ibm/s_modfl.c: In function '__modfl':
../sysdeps/ieee754/ldbl-128ibm/s_modfl.c:91:1: error: unrecognizable insn:
 }
 ^
(insn 31 30 32 2 (set (reg:DF 203)
        (subreg:DF (reg:TI 202) 8)) 
"../sysdeps/ieee754/ldbl-128ibm/s_modfl.c":44 -1
     (nil))
../sysdeps/ieee754/ldbl-128ibm/s_modfl.c:91:1: internal compiler error: in 
extract_insn, at recog.c:2311

I think it would be reasonable for you to submit your patch for inclusion 
at this point, as a useful incremental improvement.  The above error is 
fixed by a patch

Index: gcc/config/rs6000/spe.md
===================================================================
--- gcc/config/rs6000/spe.md    (revision 242699)
+++ gcc/config/rs6000/spe.md    (working copy)
@@ -2314,6 +2314,18 @@
     }
 })

+(define_insn "*frob_<SPE64:mode>_ti_8"
+  [(set (match_operand:SPE64 0 "nonimmediate_operand" "=r")
+        (subreg:SPE64 (match_operand:TI 1 "input_operand" "r") 8))]
+  "(TARGET_E500_DOUBLE && <SPE64:MODE>mode == DFmode)
+   || (TARGET_SPE && <SPE64:MODE>mode != DFmode)"
+{
+  if (WORDS_BIG_ENDIAN)
+    return "evmergelo %0,%Y1,%Z1";
+  else
+    return "evmergelo %0,%Z1,%Y1";
+})
+
 (define_insn "*frob_tf_ti"
   [(set (match_operand:TF 0 "gpc_reg_operand" "=r")
         (subreg:TF (match_operand:TI 1 "gpc_reg_operand" "r") 0))]

(I'm familiar with this part of spe.md).  That moves the error to an 
assembler error from GCC generating bad offsets building s_fmal.o

/tmp/ccLQIeP5.s: Assembler messages:
/tmp/ccLQIeP5.s:735: Error: operand out of range (256 is not between 0 and 248)

which I need to investigate further.