[Bug target/5360] [SH] Useless address inc-dec sequence for DFmode access
olegendo at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Fri May 6 05:21:00 GMT 2016
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=5360
--- Comment #6 from Oleg Endo <olegendo at gcc dot gnu.org> ---
When compiling the following test with -m2a -mb -O2
double test (void)
{
return 123.123;
}
we get
mova .L2,r0
fmov.s @r0+,fr0
fmov.s @r0,fr1
rts
add #-4,r0
.L3:
.align 2
.L2:
.long 1079953375
.long 996432413
Although the address reg is dead after the last load, the add #-4 insn is not
eliminated. This is probably because the DFmode move patterns are split at a
late stage during compilation. The add #-4 has to be put there initially
because for the register allocator the DFmode constant looks like it doesn't
modify the address register. In some cases this allows optimizations of
consecutive constant loads, as in:
void test (double* out)
{
out[0] = 123.123;
out[1] = 222;
}
mova .L2,r0
fmov.s @r0+,fr2
fmov.s @r0+,fr3
add #4,r4
fmov.s fr3,@r4
fmov.s fr2,@-r4
fmov.s @r0+,fr2
fmov.s @r0,fr3
add #-4,r0
fmov.s fr2,@(8,r4)
fmov.s fr3,@(12,r4)
rts/n
.L3:
.align 2
.L2:
.long 1079953375
.long 996432413
.long 1080803328
.long 0
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