[Bug target/70421] [5/6 Regression] wrong code with v16si vector and useless cast at -O -mavx512f

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70421

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
   Last reconfirmed|                            |2016-03-27
                 CC|                            |jakub at gcc dot gnu.org
           Assignee|unassigned at gcc dot gnu.org      |jakub at gcc dot gnu.org
     Ever confirmed|0                           |1

--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Untested fix:
--- gcc/config/i386/i386.c      (revision 234449)
+++ gcc/config/i386/i386.c      (working copy)
@@ -46930,7 +46930,7 @@ half:
     {
       tmp = gen_reg_rtx (mode);
       emit_insn (gen_rtx_SET (tmp, gen_rtx_VEC_DUPLICATE (mode, val)));
-      emit_insn (gen_blendm (target, tmp, target,
+      emit_insn (gen_blendm (target, target, tmp,
                             force_reg (mmode,
                                        gen_int_mode (1 << elt, mmode))));
     }

Both the
(define_insn "<avx512>_blendm<mode>"
  [(set (match_operand:V48_AVX512VL 0 "register_operand" "=v")
        (vec_merge:V48_AVX512VL
          (match_operand:V48_AVX512VL 2 "nonimmediate_operand" "vm")
          (match_operand:V48_AVX512VL 1 "register_operand" "v")
          (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))]
  "TARGET_AVX512F"
  "vblendm<ssemodesuffix>\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}"
  [(set_attr "type" "ssemov")
   (set_attr "prefix" "evex")
   (set_attr "mode" "<sseinsnmode>")])

(define_insn "<avx512>_blendm<mode>"
  [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v")
        (vec_merge:VI12_AVX512VL
          (match_operand:VI12_AVX512VL 2 "nonimmediate_operand" "vm")
          (match_operand:VI12_AVX512VL 1 "register_operand" "v")
          (match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))]
  "TARGET_AVX512BW"
  "vpblendm<ssemodesuffix>\t{%2, %1, %0%{%3%}|%0%{%3%}, %1, %2}"
  [(set_attr "type" "ssemov")
   (set_attr "prefix" "evex")
   (set_attr "mode" "<sseinsnmode>")])
patterns have the order of operands swapped vs. VEC_MERGE, and for VEC_MERGE
we use the
      tmp = gen_rtx_VEC_MERGE (mode, tmp, target, GEN_INT (1 << elt));
order, so I believe the above patch is right.  Will test it on Tuesday.