[Bug target/63359] aarch64: 32bit registers in inline asm

[nsz at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359

nsz at gcc dot gnu.org changed:

           What    |Removed                     |Added
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                 CC|                            |nsz at gcc dot gnu.org

--- Comment #13 from nsz at gcc dot gnu.org ---
there could be a format for reducing porting work between ilp32 and lp64 inline
asm:

asm ("ldr %?0, foo" : "=r"(ptr));

where %?0 behaves like %w0 on ilp32 and %x0 on lp64, which is a bit nicer than
doing preprocessor hacks like

#ifdef __LP64__
#define XW "x"
#else
#define XW "w"
#endif
asm ("ldr %" XW "0, foo" : "=r"(ptr));