[Bug target/71680] [7 Regression] ICE: Max. number of generated reload insns per insn is achieved (90) w/ -Os -mlra

[amodra at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71680

Alan Modra <amodra at gmail dot com> changed:

           What    |Removed                     |Added
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                 CC|                            |amodra at gmail dot com

--- Comment #8 from Alan Modra <amodra at gmail dot com> ---
From -m32 -O2 dumps of Anton's testcase:

(insn 8 9 33 3 (set (reg:SI 160 [ a ])
        (mem/c:SI (reg/f:SI 162) [1 a+0 S4 A8]))
/home/alan/src/tmp/pr71680.c:13 464 {*movsi_internal1}
     (expr_list:REG_EQUIV (mem/c:SI (reg/f:SI 162) [1 a+0 S4 A8])
        (expr_list:REG_EQUAL (mem/c:SI (symbol_ref:SI ("a") [flags 0x84] 
<var_decl 0x7f098caad870 a>) [1 a+0 S4 A8])
            (nil))))

Looking at the insn that loads reg 160 above, you'll notice movsi_internal1,
which doesn't have an alternative to allow an fpr as is required by insn 32. 
What's more, SImode isn't allowed in fprs (see rs6000_hard_regno_mode_ok) so it
doesn't make sense to add such an alternative.

What happens in reload is that reg 160 equiv mem is substituted into insn 32
then reload cleverly reloads the subreg:
Reloads for insn # 32
Reload 0: reload_in (SF) = (mem/c:SF (reg/f:SI 31 31 [162]) [1 a+0 S4 A8])
        FLOAT_REGS, RELOAD_FOR_INPUT (opnum = 1), can't combine
        reload_in_reg: (subreg:SF (reg:SI 160 [ a ]) 0)
        reload_reg_rtx: (reg:SF 44 12)

So we load from mem in SFmode, and insn 8 is deleted.  lra apparently doesn't
use the trick of changing to the mode of the subreg.