[Bug target/69442] [6 Regression] wrong code with -Og and 64bit modulo @ armv7a

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69442

--- Comment #12 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Tue Jan 26 11:12:03 2016
New Revision: 232819

URL: https://gcc.gnu.org/viewcvs?rev=232819&root=gcc&view=rev
Log:
        PR target/69442
        * combine.c (combine_instructions): For REG_EQUAL note with
        SET_DEST being ZERO_EXTRACT, also temporarily set SET_DEST
        to the underlying register.
        * doc/rtl.texi (REG_EQUAL): Document the behavior of
        REG_EQUAL/REG_EQUIV notes if SET_DEST is ZERO_EXTRACT.

        * gcc.dg/pr69442.c: New test.

Added:
    trunk/gcc/testsuite/gcc.dg/pr69442.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/combine.c
    trunk/gcc/doc/rtl.texi
    trunk/gcc/testsuite/ChangeLog