[Bug tree-optimization/69282] [6 Regression] aarch64/armhf ICE on SPEC2006 464.h264ref at -O3

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69282

--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Created attachment 37347
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=37347&action=edit
Patch which causes us not to lower the VEC_COND_EXPR

Expand already knows how to expand VEC_COND_EXPR (without an embedded
conditional) using op0 < 0 so we don't need expand_vec_cond_expr_p to return
false for those cases.

Note this fixes the ICE and I will run a testsuite run in a few minutes but it
does cause a few extra instructions still.
Here is the code which is produced:
.L2:
        ldr     q0, [x0], 16
        cmeq    v0.4s, v0.4s, #0
        not     v0.16b, v0.16b
        cmlt    v0.4s, v0.4s, #0
        bit     v1.16b, v2.16b, v0.16b
        bic     v3.16b, v3.16b, v0.16b
        add     v2.4s, v2.4s, v4.4s
        cmp     x1, x0
        bne     .L2

Notice the not and cmlt, both are useless.  To fix that, a vcond_mask* pattern
needs to be added.  I am not going to fix that right now with this
bootstrap/test though.  I will file a bug about that though.