[Bug target/48344] powerpc ICE with -fstack-limit-register=r2
dje at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Mon Jan 11 20:23:00 GMT 2016
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=48344
David Edelsohn <dje at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |dje at gcc dot gnu.org
--- Comment #4 from David Edelsohn <dje at gcc dot gnu.org> ---
The ICE appears to be the missing mode on r2, but I thought that the SET would
be generated by -fstack-limit-register common code.
However, r2 is a fixed register for SVR4 ABI, so the specific choice of r2
seems strange. The user specifically wants a fixed register and knows that it
will not be used for GOT access in this specific use case?
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