[Bug target/67462] [6 Regression] FAIL: gcc.dg/ifcvt-3.c scan-rtl-dump ce1 "3 true changes made"

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67462

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |jakub at gcc dot gnu.org

--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Created attachment 37294
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=37294&action=edit
gcc6-pr67462.patch

This is not just a cost issue, x86_64 -m32 is a 32-bit wordsize target, some of
the instructions ce1 sees are still DImode, but e.g. the comparisons are ors of
the subreg parts etc.  This really should not be expected to be optimized at
the RTL level, you'd need to optimize it at the gimple level.