[Bug rtl-optimization/68991] -O3 generates misaligned xorv4si3

[hjl.tools at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68991

--- Comment #14 from H.J. Lu <hjl.tools at gmail dot com> ---
(In reply to H.J. Lu from comment #13)

> > LRA is OK when Bm is properly defined as
> > 
> > (define_memory_constraint "Bm"
> >   "@internal Vector memory operand."
> >   (match_operand 0 "vector_memory_operand"))
> 
> It doesn't work since process_alt_operands in LRA will treat Bm as m:
> 
>                    case CT_MEMORY:
>                       if (MEM_P (op)
>                           && satisfies_memory_constraint_p (op, cn))
>                         win = true;
>                       else if (spilled_pseudo_p (op))
>                         win = true;
> 
> and ignores vector_memory_operand.

It happens with

                   case CT_MEMORY:
                      if (MEM_P (op)
                          && satisfies_memory_constraint_p (op, cn))
                        win = true;
                      else if (spilled_pseudo_p (op))
                        win = true;

                      /* If we didn't already win, we can reload constants
                         via force_const_mem or put the pseudo value into
                         memory, or make other memory by reloading the
                         address like for 'o'.  */
                      if (CONST_POOL_OK_P (mode, op)
                          || MEM_P (op) || REG_P (op))
                        badop = false;

             /* If this operand accepts a register, and if the
                 register class has at least one allocatable register,
                 then this operand can be reloaded.  */
              if (winreg && !no_regs_p)
                badop = false;