[Bug rtl-optimization/69291] [6 Regression] wrong code at -O1 for ruby-2.3.0/regcomp.c:985:compile_length_quantifier_node()

rguenth at gcc dot gnu.org gcc-bugzilla@gcc.gnu.org
Wed Feb 10 12:33:00 GMT 2016


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69291

--- Comment #8 from Richard Biener <rguenth at gcc dot gnu.org> ---
#0  noce_emit_store_flag (if_info=0x7fffffffd7d0, x=0x7ffff5ade840, 
    reversep=1, normalize=0) at /space/rguenther/src/svn/trunk3/gcc/ifcvt.c:839
#1  0x00000000017adfa3 in noce_try_store_flag_constants (
    if_info=0x7fffffffd7d0) at /space/rguenther/src/svn/trunk3/gcc/ifcvt.c:1390
#2  0x00000000017b3230 in noce_process_if_block (if_info=0x7fffffffd7d0)
    at /space/rguenther/src/svn/trunk3/gcc/ifcvt.c:3503

and we try to detect this with

      /* If we have x := test ? x + 3 : x + 4 then move the original
         x out of the way while we store flags.  */
      if (common && rtx_equal_p (common, if_info->x))
        {
          common = gen_reg_rtx (mode);
          noce_emit_move_insn (common, if_info->x);
        }

but here

(gdb) p debug_rtx (if_info->x)
(reg/v:SI 224 [ <retval> ])
(gdb) p debug_rtx (common)
(plus:SI (reg/v:SI 160 [ mod_tlen ])
    (reg/v:SI 224 [ <retval> ]))

I suppose it should use reg_mentioned_p instead.  But even then the generated
code is broken.  Seems it doesn't expect a plus as common at all.  It then
copies the reg and does

(insn 842 353 843 63 (set (reg:SI 331)
        (reg/v:SI 224 [ <retval> ])) regcomp.c:1012 86 {*movsi_internal}
     (nil))
(insn 843 842 844 63 (set (reg:CCZ 17 flags)
        (compare:CCZ (mem/f:SI (plus:SI (reg/v/f:SI 225 [ node ])
                    (const_int 32 [0x20])) [10 MEM[(struct QtfrNode
*)node_14(D)].next_head_exact+0 S4 A32])
            (const_int 0 [0]))) regcomp.c:1012 3 {*cmpsi_ccno_1}
     (nil))
(insn 844 843 845 63 (set (reg:QI 332)
        (ne:QI (reg:CCZ 17 flags)
            (const_int 0 [0]))) regcomp.c:1012 631 {*setcc_qi}
     (nil))
(insn 845 844 846 63 (set (reg/v:SI 224 [ <retval> ])
        (zero_extend:SI (reg:QI 332))) regcomp.c:1012 136 {*zero_extendqisi2}
     (nil))
(insn 846 845 847 63 (parallel [
            (set (reg/v:SI 224 [ <retval> ])
                (plus:SI (reg/v:SI 224 [ <retval> ])
                    (reg:SI 331)))
            (clobber (reg:CC 17 flags))
        ]) regcomp.c:1012 218 {*addsi_1}
     (nil))
(insn 847 846 366 63 (parallel [
            (set (reg/v:SI 224 [ <retval> ])
                (plus:SI (reg/v:SI 224 [ <retval> ])
                    (const_int 10 [0xa])))
            (clobber (reg:CC 17 flags))
        ]) regcomp.c:1012 218 {*addsi_1}
     (nil))

and so loses the reg:SI 160 addend.


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