[Bug target/67032] [4.9/5/6 Regression] Geode optimizations incorrectly return -NaN

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67032

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|ra                          |
             Status|NEW                         |ASSIGNED
           Assignee|unassigned at gcc dot gnu.org      |ubizjak at gmail dot com

--- Comment #13 from Uroš Bizjak <ubizjak at gmail dot com> ---
Well... at the end, it was target problem. For the RA to work as expected, we
have to provide some sensible cost values for MMX and SSE register moves.
Following patch fixes the problem:

--cut here--
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index b500233..121e802 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -595,17 +595,17 @@ struct processor_costs geode_cost = {
   {4, 6, 6},                           /* cost of storing fp registers
                                           in SFmode, DFmode and XFmode */

-  1,                                   /* cost of moving MMX register */
-  {1, 1},                              /* cost of loading MMX registers
+  2,                                   /* cost of moving MMX register */
+  {2, 2},                              /* cost of loading MMX registers
                                           in SImode and DImode */
-  {1, 1},                              /* cost of storing MMX registers
+  {2, 2},                              /* cost of storing MMX registers
                                           in SImode and DImode */
-  1,                                   /* cost of moving SSE register */
-  {1, 1, 1},                           /* cost of loading SSE registers
+  2,                                   /* cost of moving SSE register */
+  {2, 2, 8},                           /* cost of loading SSE registers
                                           in SImode, DImode and TImode */
-  {1, 1, 1},                           /* cost of storing SSE registers
+  {2, 2, 8},                           /* cost of storing SSE registers
                                           in SImode, DImode and TImode */
-  1,                                   /* MMX or SSE register to integer */
+  6,                                   /* MMX or SSE register to integer */
   64,                                  /* size of l1 cache.  */
   128,                                 /* size of l2 cache.  */
   32,                                  /* size of prefetch block */
--cut here--