[Bug target/69577] [5/6 Regression] wrong code with -fno-forward-propagate -mavx and 128bit arithmetics since r215450

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69577

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |uros at gcc dot gnu.org,
                   |                            |vmakarov at gcc dot gnu.org

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
This looks like a RA issue or backend bug, perhaps the r215450 change needs to
be narrowed down?

In *.ira we have:
(insn 3 2 4 2 (set (reg/v:V2TI 102 [ y ])
        (mem/c:V2TI (reg/f:DI 16 argp) [1 y+0 S32 A256])) pr69577.c:5 1225
{*movv2ti_internal}
     (expr_list:REG_EQUIV (mem/c:V2TI (reg/f:DI 16 argp) [1 y+0 S32 A256])
        (nil)))
...
(insn 13 12 15 2 (set (subreg:TI (reg/v:V2TI 102 [ y ]) 0)
        (reg:TI 106)) pr69577.c:6 84 {*movti_internal}
     (expr_list:REG_DEAD (reg:TI 106)
        (nil)))
...
(insn 16 15 17 2 (set (reg:OI 108 [ y.0_11 ])
        (subreg:OI (reg/v:V2TI 102 [ y ]) 0)) pr69577.c:7 83
{*movoi_internal_avx}
     (expr_list:REG_DEAD (reg/v:V2TI 102 [ y ])
        (nil)))
and in *.reload this is:
(insn 3 2 4 2 (set (reg/v:V2TI 21 xmm0 [orig:102 y ] [102])
        (mem/c:V2TI (plus:DI (reg/f:DI 7 sp)
                (const_int 96 [0x60])) [1 y+0 S32 A256])) pr69577.c:5 1225
{*movv2ti_internal}
     (expr_list:REG_EQUIV (mem/c:V2TI (reg/f:DI 16 argp) [1 y+0 S32 A256])
        (nil)))
...
(insn 13 12 57 2 (set (mem/c:TI (reg/f:DI 7 sp) [2 %sfp+-64 S16 A256])
        (reg:TI 0 ax [106])) pr69577.c:6 84 {*movti_internal}
     (nil))
(insn 57 13 15 2 (set (reg:TI 21 xmm0 [orig:102 y ] [102])
        (mem/c:TI (reg/f:DI 7 sp) [2 %sfp+-64 S16 A256])) pr69577.c:6 84
{*movti_internal}
     (nil))
...
(insn 16 58 17 2 (set (mem/c:OI (plus:DI (reg/f:DI 7 sp)
                (const_int 32 [0x20])) [2 %sfp+-32 S32 A256])
        (reg:OI 21 xmm0 [orig:102 y ] [102])) pr69577.c:7 83
{*movoi_internal_avx}
     (nil))

insn 13 is supposed to change just the low 128-bits of the 256-bit register and
preserve the high 128 bits, but after reload the instruction doesn't do that
anymore, it clears the high 128 bits instead.  So, either IRA or LRA should
have prevented assigning pseudo 102 to ymm0 register because of this, or
something should have transformed that into a vector insertion instruction
instead.  Richard, can you please have a look?