[Bug target/78516] [7 Regression] ICE in lra_assign for e500v2

[bergner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78516

Peter Bergner <bergner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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  Attachment #40317|0                           |1
        is obsolete|                            |

--- Comment #5 from Peter Bergner <bergner at gcc dot gnu.org> ---
Created attachment 40321
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=40321&action=edit
Updated fix

(In reply to Peter Bergner from comment #4)
>  (define_insn "*mov_si<mode>_e500_subreg0_2_be"
> -  [(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "+r,m")
> -       (subreg:SI (match_operand:SPE64TF 1 "register_operand" "+r,&r") 0))]
> +  [(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "=r,&m")
> +       (subreg:SI (match_operand:SPE64TF 1 "register_operand" "r,r") 0))]
>    "WORDS_BIG_ENDIAN
>     && ((TARGET_E500_DOUBLE && (<MODE>mode == DFmode || <MODE>mode ==
> TFmode))
>         || (TARGET_SPE && <MODE>mode != DFmode && <MODE>mode != TFmode))"
>    "@
> -   evmergehi %0,%0,%1
> +   evmergelohi %0,%1,%1
>     evmergelohi %1,%1,%1\;stw%U0%X0 %1,%0"
>    [(set_attr "length" "4,8")])

Of course now that I've had time to think of this, I think the correct thing
here isn't to move the earlyclobber to the 'm' constraint, but to add the '+'
modifier to the '&r' constraint to show that is is not only an input, but it is
modified as well.
...and '+' has to be at the beginning of the constraint string, hence why it
was located where it was originally. :-)

So that leaves us with this smaller change:

 (define_insn "*mov_si<mode>_e500_subreg0_2_be"
-  [(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "+r,m")
+  [(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "=r,m")
        (subreg:SI (match_operand:SPE64TF 1 "register_operand" "+r,&r") 0))]
   "WORDS_BIG_ENDIAN
    && ((TARGET_E500_DOUBLE && (<MODE>mode == DFmode || <MODE>mode == TFmode))
        || (TARGET_SPE && <MODE>mode != DFmode && <MODE>mode != TFmode))"
   "@
-   evmergehi %0,%0,%1
+   evmergelohi %0,%1,%1
    evmergelohi %1,%1,%1\;stw%U0%X0 %1,%0"
   [(set_attr "length" "4,8")])

Joseph, ignore the last patch and try this one.