[Bug rtl-optimization/78652] LRA generates wrong code by inheriting changed register
amker at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Fri Dec 2 13:54:00 GMT 2016
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78652
--- Comment #1 from amker at gcc dot gnu.org ---
GCC is configured as below:
--target=arm-none-eabi --prefix=... --with-gmp=... --with-mpfr=...
--with-mpc=... --with-isl=... --disable-shared --disable-nls --disable-threads
--disable-tls --enable-checking=yes --enable-languages=c,c++,fortran
--with-newlib
Piece of generated assmebly is as:
ldr r5, .L44 <------init r5
ldrsh r0, [r0]
movt r3, #:upper16:l
movcs r1, #0
movcc r1, #1
cmp lr, r1
ldrh ip, [r5, #12]! <------modify r5
ldr r3, [r3]
movw fp, #:lower16:v
movge r1, #0
movlt r1, #1
str r1, [sp, #8]
movt fp, #:upper16:v
ldrb r1, [r4, #203]
movw r2, #:lower16:a
movw r9, #:lower16:u
movw r8, #:lower16:t
cmp r1, r0
movw r7, #:lower16:.LANCHOR1
movw r6, #:lower16:s
movt r2, #:upper16:a
movlt r1, #0
movge r1, #1
movt r9, #:upper16:u
strh r1, [r5] <------inherit use of changed r5.
It's clear LRA inherits register with changed value for r5. Looking at below
dump of IRA:
51: r262:SI=const(`*.LANCHOR0'+0x100) <------init r262
REG_EQUIV const(`*.LANCHOR0'+0x100)
277: r186:SI=high(`p')
REG_EQUAL high(`p')
279: r258:SI=high(`n')
REG_EQUAL high(`n')
278: r186:SI=r186:SI+low(`p')
REG_EQUAL `p'
280: r258:SI=r258:SI+low(`n')
REG_EQUAL `n'
275: r185:SI=high(`c')
REG_EQUAL high(`c')
276: r185:SI=r185:SI+low(`c')
REG_EQUAL `c'
58: r187:SI=sign_extend([r186:SI])
REG_DEAD r186:SI
REG_EQUAL sign_extend([`p'])
60: r190:SI=[r258:SI]
REG_EQUIV [r258:SI]
REG_EQUAL [`n']
273: r176:SI=high(`i')
REG_EQUAL high(`i')
254: r263:SI=r262:SI <------init r263 with r262
274: r176:SI=r176:SI+low(`i')
REG_EQUAL `i'
281: r203:SI=high(`l')
REG_EQUAL high(`l')
282: r203:SI=r203:SI+low(`l')
REG_EQUAL `l'
63: r193:SI=[r185:SI]
REG_DEAD r185:SI
REG_EQUAL [`c']
62: {r191:SI=ltu(r187:SI,r190:SI);clobber cc:CC;}
REG_DEAD r190:SI
REG_DEAD r187:SI
REG_UNUSED cc:CC
71: r201:SI=zero_extend([pre r263:SI+=0xc]) <------r263 is modified
REG_INC r263:SI
REG_EQUAL zero_extend([const(`*.LANCHOR0'+0x10c)])
283: r266:SI=high(`a')
REG_EQUAL high(`a')
45: r116:SI=sign_extend([r176:SI])
REG_DEAD r176:SI
65: {r126:SI=r193:SI<r191:SI;clobber cc:CC;}
REG_DEAD r193:SI
REG_DEAD r191:SI
REG_UNUSED cc:CC
76: r130:SI=[r203:SI]
REG_DEAD r203:SI
REG_EQUAL [`l']
74: r128:SI=sign_extract(r201:SI,0x9,0)
REG_DEAD r201:SI
42: r114:SI=zero_extend([r264:SI+0xcb])
REG_EQUAL zero_extend([const(`*.LANCHOR0'+0xcb)])
284: r266:SI=r266:SI+low(`a')
REG_EQUAL `a'
285: r259:SI=high(`q')
REG_EQUAL high(`q')
287: r272:SI=high(`u')
REG_EQUAL high(`u')
286: r259:SI=r259:SI+low(`q')
REG_EQUAL `q'
288: r272:SI=r272:SI+low(`u')
REG_EQUAL `u'
289: r273:SI=high(`t')
REG_EQUAL high(`t')
291: r274:SI=high(`v')
REG_EQUAL high(`v')
290: r273:SI=r273:SI+low(`t')
REG_EQUAL `t'
292: r274:SI=r274:SI+low(`v')
REG_EQUAL `v'
293: r275:SI=high(`*.LANCHOR1')
REG_EQUAL high(`*.LANCHOR1')
294: r275:SI=r275:SI+low(`*.LANCHOR1')
REG_EQUAL `*.LANCHOR1'
295: r276:SI=high(`s')
REG_EQUAL high(`s')
296: r276:SI=r276:SI+low(`s')
REG_EQUAL `s'
47: [r264:SI+0x18]=r116:SI#0
53: {r184:SI=r114:SI>=r116:SI;clobber cc:CC;}
REG_DEAD r116:SI
REG_DEAD r114:SI
REG_UNUSED cc:CC
55: [r262:SI]=r184:SI#0 <-------use of r262
It results in assigning the same hard register (r5) to both r263 and r262.
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