[Bug rtl-optimization/70826] [7 regression] many test cases fail starting with r235442
seurer at linux dot vnet.ibm.com
gcc-bugzilla@gcc.gnu.org
Thu Apr 28 14:15:00 GMT 2016
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70826
--- Comment #6 from Bill Seurer <seurer at linux dot vnet.ibm.com> ---
mfcr is "move from condition register" and it copies the contents of the
condition register into a general-purpose register. In this case it copies the
condition register into "tmp".
I did some quick chopping on the source and this still produces the error:
/* { dg-do run } */
/* { dg-options "-fno-inline -fomit-frame-pointer" } */
/* { dg-additional-options "-mdynamic-no-pic" { target *-*-darwin* } } */
/* -fno-inline -maltivec -m32/-m64 -mmultiple/no-multiple -Os/-O2. */
#ifndef NO_BODY
#define abort() __builtin_abort ()
#define vec_all_eq(v1,v2) __builtin_vec_vcmpeq_p (2, v1, v2)
#define SET(T,R,V) register T R __asm__ (#R) = V
#define SET_GPR(R,V) SET (long, R, V)
#define SET_FPR(R,V) SET (double, R, V)
#define SET_VR(R,V) SET (__attribute__ ((vector_size (16))) int, R, V)
#define SET_CR(R,V) __asm__ __volatile__ ("mtcrf %0,%1" : : "n" (1<<(7-R)), "r"
(V<<(4*(7-R))) : "cr" #R)
#define TRASH_GPR(R) SET_GPR (R, 0)
#define TRASH_FPR(R) SET_FPR (R, 0)
#define TRASH_VR(R) SET_VR (R, val0)
#define TRASH_CR(R) SET_CR (R, 0)
#define TRASH_SOME_GPR TRASH_GPR (r30); TRASH_GPR (r31)
#define TRASH_SOME_FPR TRASH_FPR (fr28); TRASH_FPR (fr31)
#define TRASH_SOME_VR TRASH_VR (v26); TRASH_VR (v27); TRASH_VR (v31)
#define TRASH_SOME_CR TRASH_CR (2)
#define TRASH_ALL_GPR TRASH_GPR (r14); TRASH_GPR (r15); TRASH_GPR (r16);
TRASH_GPR (r17); TRASH_GPR (r18); TRASH_GPR (r19); TRASH_GPR (r20); TRASH_GPR
(r21); TRASH_GPR (r22); TRASH_GPR (r23); TRASH_GPR (r24); TRASH_GPR (r25);
TRASH_GPR (r26); TRASH_GPR (r27); TRASH_GPR (r28); TRASH_GPR (r29); TRASH_GPR
(r30); TRASH_GPR (r31)
#define TRASH_ALL_FPR TRASH_FPR (fr14); TRASH_FPR (fr15); TRASH_FPR (fr16);
TRASH_FPR (fr17); TRASH_FPR (fr18); TRASH_FPR (fr19); TRASH_FPR (fr20);
TRASH_FPR (fr21); TRASH_FPR (fr22); TRASH_FPR (fr23); TRASH_FPR (fr24);
TRASH_FPR (fr25); TRASH_FPR (fr26); TRASH_FPR (fr27); TRASH_FPR (fr28);
TRASH_FPR (fr29); TRASH_FPR (fr30); TRASH_FPR (fr31)
#define TRASH_ALL_VR TRASH_VR (v20); TRASH_VR (v21); TRASH_VR (v22); TRASH_VR
(v23); TRASH_VR (v24); TRASH_VR (v25); TRASH_VR (v26); TRASH_VR (v27); TRASH_VR
(v28); TRASH_VR (v29); TRASH_VR (v30); TRASH_VR (v31)
#define TRASH_ALL_CR TRASH_CR (2); TRASH_CR (3); TRASH_CR (4)
#define USE_SOME_GPR __asm__ __volatile__ ("#%0 %1" : : "r" (r30), "r" (r31))
#define USE_SOME_FPR __asm__ __volatile__ ("#%0 %1" : : "f" (fr28), "f" (fr31))
#define USE_SOME_VR __asm__ __volatile__ ("#%0 %1 %2" : : "v" (v26), "v" (v27),
"v" (v31))
#define USE_SOME_CR
#define USE_ALL_GPR __asm__ __volatile__ ("#%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10
%11 %12 %13 %14 %15 %16 %17" : : "r" (r14), "r" (r15), "r" (r16), "r" (r17),
"r" (r18), "r" (r19), "r" (r20), "r" (r21), "r" (r22), "r" (r23), "r" (r24),
"r" (r25), "r" (r26), "r" (r27), "r" (r28), "r" (r29), "r" (r30), "r" (r31))
#define USE_ALL_FPR __asm__ __volatile__ ("#%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10
%11 %12 %13 %14 %15 %16 %17" : : "f" (fr14), "f" (fr15), "f" (fr16), "f"
(fr17), "f" (fr18), "f" (fr19), "f" (fr20), "f" (fr21), "f" (fr22), "f" (fr23),
"f" (fr24), "f" (fr25), "f" (fr26), "f" (fr27), "f" (fr28), "f" (fr29), "f"
(fr30), "f" (fr31))
#define USE_ALL_VR __asm__ __volatile__ ("#%0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10
%11" : : "v" (v20), "v" (v21), "v" (v22), "v" (v23), "v" (v24), "v" (v25), "v"
(v26), "v" (v27), "v" (v28), "v" (v29), "v" (v30), "v" (v31))
#define USE_ALL_CR
#define INIT_GPR SET_GPR (r14, 14); SET_GPR (r15, 15); SET_GPR (r16, 16);
SET_GPR (r17, 17); SET_GPR (r18, 18); SET_GPR (r19, 19); SET_GPR (r20, 20);
SET_GPR (r21, 21); SET_GPR (r22, 22); SET_GPR (r23, 23); SET_GPR (r24, 24);
SET_GPR (r25, 25); SET_GPR (r26, 26); SET_GPR (r27, 27); SET_GPR (r28, 28);
SET_GPR (r29, 29); SET_GPR (r30, 30); SET_GPR (r31, 31)
#define INIT_FPR SET_FPR (fr14, 140.0); SET_FPR (fr15, 150.0); SET_FPR (fr16,
160.0); SET_FPR (fr17, 170.0); SET_FPR (fr18, 180.0); SET_FPR (fr19, 190.0);
SET_FPR (fr20, 200.0); SET_FPR (fr21, 210.0); SET_FPR (fr22, 220.0); SET_FPR
(fr23, 230.0); SET_FPR (fr24, 240.0); SET_FPR (fr25, 250.0); SET_FPR (fr26,
260.0); SET_FPR (fr27, 270.0); SET_FPR (fr28, 280.0); SET_FPR (fr29, 290.0);
SET_FPR (fr30, 300.0); SET_FPR (fr31, 310.0)
#define INIT_VR SET_VR (v20, val20); SET_VR (v21, val21); SET_VR (v22, val22);
SET_VR (v23, val23); SET_VR (v24, val24); SET_VR (v25, val25); SET_VR (v26,
val26); SET_VR (v27, val27); SET_VR (v28, val28); SET_VR (v29, val29); SET_VR
(v30, val30); SET_VR (v31, val31)
#define INIT_CR SET_CR (2, 6); SET_CR (3, 7); SET_CR (4, 8)
#ifdef __ALTIVEC__
__attribute__ ((vector_size (16))) int val0 = {0,0,0,0};
__attribute__ ((vector_size (16))) int val20 = {-201,-202,-203,-204};
__attribute__ ((vector_size (16))) int val21 = {-211,-212,-213,-214};
__attribute__ ((vector_size (16))) int val22 = {-221,-222,-223,-224};
__attribute__ ((vector_size (16))) int val23 = {-231,-232,-233,-234};
__attribute__ ((vector_size (16))) int val24 = {-241,-242,-243,-244};
__attribute__ ((vector_size (16))) int val25 = {-251,-252,-253,-254};
__attribute__ ((vector_size (16))) int val26 = {-261,-262,-263,-264};
__attribute__ ((vector_size (16))) int val27 = {-271,-272,-273,-274};
__attribute__ ((vector_size (16))) int val28 = {-281,-282,-283,-284};
__attribute__ ((vector_size (16))) int val29 = {-291,-292,-293,-294};
__attribute__ ((vector_size (16))) int val30 = {-301,-302,-303,-304};
__attribute__ ((vector_size (16))) int val31 = {-311,-312,-313,-314};
#define INIT_REGS INIT_VR; INIT_FPR; INIT_GPR; INIT_CR
#else
#ifndef __NO_FPRS__
#define INIT_REGS INIT_FPR; INIT_GPR; INIT_CR
#else
#define INIT_REGS INIT_GPR; INIT_CR
#endif
#endif
#define VERIFY_GPR if (r14 != 14 || r15 != 15 || r16 != 16 || r17 != 17 || r18
!= 18 || r19 != 19 || r20 != 20 || r21 != 21 || r22 != 22 || r23 != 23 || r24
!= 24 || r25 != 25 || r26 != 26 || r27 != 27 || r28 != 28 || r29 != 29 || r30
!= 30 || r31 != 31) abort ()
#define VERIFY_FPR if (fr14 != 140.0 || fr15 != 150.0 || fr16 != 160.0 || fr17
!= 170.0 || fr18 != 180.0 || fr19 != 190.0 || fr20 != 200.0 || fr21 != 210.0 ||
fr22 != 220.0 || fr23 != 230.0 || fr24 != 240.0 || fr25 != 250.0 || fr26 !=
260.0 || fr27 != 270.0 || fr28 != 280.0 || fr29 != 290.0 || fr30 != 300.0 ||
fr31 != 310.0) abort ()
#define VERIFY_VR if (!vec_all_eq (v20, val20) || !vec_all_eq (v21, val21) ||
!vec_all_eq (v22, val22) || !vec_all_eq (v23, val23) || !vec_all_eq (v24,
val24) || !vec_all_eq (v25, val25) || !vec_all_eq (v26, val26) || !vec_all_eq
(v27, val27) || !vec_all_eq (v28, val28) || !vec_all_eq (v29, val29) ||
!vec_all_eq (v30, val30) || !vec_all_eq (v31, val31)) abort ()
#define VERIFY_CR ({ int tmp; __asm__ __volatile__ ("mfcr %0" : "=r" (tmp)); if
((tmp & ((15 << 20) | (15 << 16) | (15 << 12))) != ((6 << 20) | (7 << 16) | (8
<< 12))) abort (); })
#ifdef __ALTIVEC__
#define VERIFY_REGS VERIFY_VR; VERIFY_FPR; VERIFY_GPR; VERIFY_CR
#else
#ifndef __NO_FPRS__
#define VERIFY_REGS VERIFY_FPR; VERIFY_GPR; VERIFY_CR
#else
#define VERIFY_REGS VERIFY_GPR; VERIFY_CR
#endif
#endif
#else /* NO_BODY */
/* For looking at prologue and epilogue code without distractions. */
#define abort()
#define TRASH_ALL_CR
#define TRASH_ALL_VR
#define TRASH_ALL_FPR
#define TRASH_ALL_GPR
#define USE_ALL_CR
#define USE_ALL_VR
#define USE_ALL_FPR
#define USE_ALL_GPR
#define TRASH_SOME_CR
#define TRASH_SOME_VR
#define TRASH_SOME_FPR
#define TRASH_SOME_GPR
#define USE_SOME_CR
#define USE_SOME_VR
#define USE_SOME_FPR
#define USE_SOME_GPR
#define INIT_REGS
#define VERIFY_REGS
#endif
void b_vfr (void)
{
char a[33000];
TRASH_SOME_VR;
TRASH_SOME_FPR;
TRASH_SOME_GPR;
USE_SOME_VR;
USE_SOME_FPR;
USE_SOME_GPR;
__asm __volatile ("#%0" : "=m" (a) : : "v26", "v27", "v31", "fr28", "fr31",
"r30", "r31");
}
void b_cvf (void)
{
char a[33000];
TRASH_SOME_CR;
TRASH_SOME_VR;
TRASH_SOME_FPR;
USE_SOME_CR;
USE_SOME_VR;
USE_SOME_FPR;
__asm __volatile ("#%0" : "=m" (a) : : "cr2", "v26", "v27", "v31", "fr28",
"fr31");
}
void b_vf (void)
{
char a[33000];
TRASH_SOME_VR;
TRASH_SOME_FPR;
USE_SOME_VR;
USE_SOME_FPR;
__asm __volatile ("#%0" : "=m" (a) : : "v26", "v27", "v31", "fr28", "fr31");
}
void b_cvr (void)
{
char a[33000];
TRASH_SOME_CR;
TRASH_SOME_VR;
TRASH_SOME_GPR;
USE_SOME_CR;
USE_SOME_VR;
USE_SOME_GPR;
__asm __volatile ("#%0" : "=m" (a) : : "cr2", "v26", "v27", "v31", "r30",
"r31");
}
int main (void)
{
INIT_REGS;
USE_ALL_CR;
USE_ALL_VR;
USE_ALL_FPR;
USE_ALL_GPR;
VERIFY_REGS;
b_vfr ();
VERIFY_REGS;
b_cvf ();
VERIFY_REGS;
b_vf ();
{
int tmp; __asm__ __volatile__ ("mfcr %0" : "=r" (tmp));
if ((tmp & ((15 << 20) | (15 << 16) | (15 << 12))) != ((6 << 20) | (7 <<
16) | (8 << 12))) abort ();
}
b_cvr ();
VERIFY_REGS;
return 0;
}
More information about the Gcc-bugs
mailing list