[Bug target/67646] New: [SH] Improve sign extract of bit test

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67646

            Bug ID: 67646
           Summary: [SH] Improve sign extract of bit test
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
  Target Milestone: ---
            Target: sh*-*-*

The following:

unsigned int test (unsigned int x)
{
  return (x & 0x30) ? ~0 : 0;
}

compiled with -m4 -ml -O2 results in:

        mov     r4,r0
        tst     #48,r0
        subc    r0,r0
        rts
        not     r0,r0

This is already minimal, but in some cases addc can be used:

        mov     r4,r0
        tst     #48,r0
        mov     #0,r1
        mov     #-1,r0
        addc    r1,r0     r0 = 0 + (-1) + T
                          T = 0: r0 = 0 + (-1) + 0 = -1
                          T = 1: r0 = 0 + (-1) + 1 = 0

If the constant 0 can be shared with some other insn, this would result in a
mov #imm8, addc sequence, which is good for SH4A, because mov #imm8 is an MT
group insn.


If the test constant is only one bit:

unsigned int test (unsigned int x)
{
  return (x & 0x20) ? ~0 : 0;
}

-m4 -ml -O2:
        mov     r4,r0
        tst     #32,r0
        mov     #-1,r0
        negc    r0,r0
        rts     
        neg     r0,r0

This should result in the same code as for the constant 0x30.