[Bug target/49065] Write of non-aligned volatile float generates extra read instructions on PowerPC

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49065

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2015-11-22
                 CC|                            |segher at gcc dot gnu.org
     Ever confirmed|0                           |1

--- Comment #1 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Confirmed.  Not specific to PowerPC; there are many duplicate reports
of this.  For most modern PowerPC processors you now get ldw/stw, since
those orocessors can handle unaligned accesses fine.  You do still end
up with an RMW in the volatile case.  To get the byte accesses use e.g.
-mcpu=403.