[Bug target/68416] [MPX] GCC emits a lot of redundant bndmov instructions

[ienkovich at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68416

--- Comment #1 from Ilya Enkovich <ienkovich at gcc dot gnu.org> ---
Seems the problem is in register allocation.  Before allocation we have:

    1: NOTE_INSN_DELETED                                                      
    6: NOTE_INSN_BASIC_BLOCK 2                                                
    2: r95:DI=di:DI                                                           
      REG_DEAD di:DI                                                          
    3: r96:SI=si:SI                                                           
      REG_DEAD si:SI                                                          
    4: r97:BND64=bnd0:BND64                                                   
      REG_DEAD bnd0:BND64                                                     
    5: NOTE_INSN_FUNCTION_BEG                                                 
    8: {unspec[r97:BND64,r95:DI] 92;[r95:DI]=unspec[[r95:DI]] 95;}            
    9: NOTE_INSN_DELETED                                                      
   10: {unspec[r97:BND64,r95:DI+0x7] 93;[r95:DI+0x7]=unspec[[r95:DI+0x7]] 95;}
      REG_DEAD r97:BND64                                                      
   11: r87:DI=[r95:DI]                                                        
   12: {r92:BND64=unspec[[unspec[r95:DI,r87:DI] 91]] 90;use [r95:DI];}        
      REG_DEAD r95:DI                                                         
   13: r99:DI=sign_extend(r96:SI)                                             
      REG_DEAD r96:SI                                                         
   14: NOTE_INSN_DELETED                                                      
   15: r90:DI=r99:DI<<0x2+r87:DI                                              
      REG_DEAD r99:DI                                                         
      REG_DEAD r87:DI                                                         
   16: {unspec[r92:BND64,r90:DI] 92;[r90:DI]=unspec[[r90:DI]] 95;}            
   17: NOTE_INSN_DELETED                                                      
   18: {unspec[r92:BND64,r90:DI+0x3] 93;[r90:DI+0x3]=unspec[[r90:DI+0x3]] 95;}
      REG_DEAD r92:BND64                                                      
   19: r103:SI=[r90:DI]                                                       
      REG_DEAD r90:DI                                                         
   24: ax:SI=r103:SI                                                          
      REG_DEAD r103:SI                                                        
   25: use ax:SI                                                              

After allocation:

    1: NOTE_INSN_DELETED
    6: NOTE_INSN_BASIC_BLOCK 2
    4: [sp:DI-0x18]=bnd0:BND64
    5: NOTE_INSN_FUNCTION_BEG
   28: bnd1:BND64=[sp:DI-0x18]
    8: {unspec[bnd1:BND64,di:DI] 92;[di:DI]=unspec[[di:DI]] 95;}
    9: NOTE_INSN_DELETED
   29: bnd2:BND64=[sp:DI-0x18]
   10: {unspec[bnd2:BND64,di:DI+0x7] 93;[di:DI+0x7]=unspec[[di:DI+0x7]] 95;}
   11: ax:DI=[di:DI]
   12: {bnd3:BND64=unspec[[unspec[di:DI,ax:DI] 91]] 90;use [di:DI];}
   30: [sp:DI-0x18]=bnd3:BND64
   13: si:DI=sign_extend(si:SI)
   14: NOTE_INSN_DELETED
   15: ax:DI=si:DI<<0x2+ax:DI
   31: bnd0:BND64=[sp:DI-0x18]
   16: {unspec[bnd0:BND64,ax:DI] 92;[ax:DI]=unspec[[ax:DI]] 95;}
   17: NOTE_INSN_DELETED
   32: bnd1:BND64=[sp:DI-0x18]
   18: {unspec[bnd1:BND64,ax:DI+0x3] 93;[ax:DI+0x3]=unspec[[ax:DI+0x3]] 95;}
   19: ax:SI=[ax:DI]
   24: ax:SI=ax:SI
   25: use ax:SI
   27: NOTE_INSN_DELETED

Here even simple r97:BND64=bnd0:BND64 goes through stack with a load at each
use like if bounds register usage kills it.