[Bug middle-end/68134] [6 Regression] float64x1_t comparison ICE on aarch64-none-elf
ienkovich at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Fri Nov 13 09:27:00 GMT 2015
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68134
Ilya Enkovich <ienkovich at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |ienkovich at gcc dot gnu.org
--- Comment #4 from Ilya Enkovich <ienkovich at gcc dot gnu.org> ---
Seems the problem is that we have V1DF mode but don't have V1DI mode. It
causes mode_for_vector to return DI instead of V1DI which makes vector lowering
pass think it is a scalar statements which doesn't need lowering. This patch
should help:
diff --git a/gcc/targhooks.c b/gcc/targhooks.c
index c34b4e9..66d983b 100644
--- a/gcc/targhooks.c
+++ b/gcc/targhooks.c
@@ -1093,8 +1093,8 @@ default_get_mask_mode (unsigned nunits, unsigned
vector_size)
gcc_assert (elem_size * nunits == vector_size);
vector_mode = mode_for_vector (elem_mode, nunits);
- if (VECTOR_MODE_P (vector_mode)
- && !targetm.vector_mode_supported_p (vector_mode))
+ if (!VECTOR_MODE_P (vector_mode)
+ || !targetm.vector_mode_supported_p (vector_mode))
vector_mode = BLKmode;
return vector_mode;
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