[Bug target/66235] New: [SH] Optimize tst reg,const movrt sequence

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66235

            Bug ID: 66235
           Summary: [SH] Optimize tst reg,const movrt sequence
           Product: gcc
           Version: 6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
  Target Milestone: ---
            Target: sh*-*-*

The following example:

bool test_00 (unsigned int x)
{
  return (x & 0x1042A) != 0;
}

compiled with -O2 -m4:

        mov.l   .L3,r1
        tst     r1,r4
        mov     #-1,r1
        rts
        negc    r1,r0
.L4:
        .align 2
.L3:
        .long   0x1042A

On non-SH2A there is no movrt insn and a !T -> reg move is done via negc.  If
the preceeding tst insn uses a constant, the constant can be complemented to
avoid the negc and #-1 constant load:

        mov.l   .L3,r1
        tst     r1,r4
        rts
        movt    r0
.L4:
        .align 2
.L3:
        .long   0xFFFEFBD5

The tstsi_t splitter could be extended to look for a following movrt insn and
optimize it accordingly.

The downside of doing this is an increased constant pool size, if the original
(non-complemented) constant is used for something else.  Moreover, it is only
beneficial to do this if there are no other negc #-1 movrt insns which share
the #-1 constant.  On the other hand, sharing the #-1 constant increases the
life time of regs and thus increases reg pressure.