[Bug target/65242] [5 Regression] ICE (in gen_add2_insn, at optabs.c:4761) on powerpc64le-linux-gnu

[meissner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65242

--- Comment #8 from Michael Meissner <meissner at gcc dot gnu.org> ---
I'm going to start looking at this.  I suspect the issue is we need more checks
about the offset in TOC references.  In particular, the 64-bit GPR load/store
instruction (ld, std), the sign-extended 32-bit load (lwa), and 128-bit
load/store (lq, stq) are B-form instructions instead of D-form, meaning that
the bottom 2 bits of the offset are required to be zero, and the encoding uses
these bits for other purposes.