[Bug target/64652] New: [SH] ICE when using -mdiv=call-fp

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64652

            Bug ID: 64652
           Summary: [SH] ICE when using -mdiv=call-fp
           Product: gcc
           Version: 5.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
            Target: sh*-*-*

Compiling the following example:

int test (int a, int b, int c, int d)
{
  return (a / b) + c + d;
}

with -O2 -m4 -ml -mdiv=call-fp

results in:

sh_tmp.cpp: In function 'test':
sh_tmp.cpp:672:1: error: unrecognizable insn:
 }
 ^
(insn 50 30 12 (set (reg:SI 146 pr)
        (unspec:SI [
                (reg:SI 154 fpscr0)
            ] UNSPEC_SFUNC)) sh_tmp.cpp:671 -1
     (nil))
sh_tmp.cpp:672:1: internal compiler error: in num_delay_slots, at
config/sh/sh.md:537

It looks like the SH mach pass expects the first "use" to be the GP reg that
holds the sfunc address.  Changing the order of the uses seems to fix the
problem:

Index: gcc/config/sh/sh.md
===================================================================
--- gcc/config/sh/sh.md    (revision 219623)
+++ gcc/config/sh/sh.md    (working copy)
@@ -2402,8 +2402,8 @@
    (clobber (reg:SI R4_REG))
    (clobber (reg:SI R5_REG))
    (clobber (reg:SI FPSCR_STAT_REG))
-   (use (reg:SI FPSCR_MODES_REG))
-   (use (match_operand:SI 1 "arith_reg_operand" "r"))]
+   (use (match_operand:SI 1 "arith_reg_operand" "r"))
+   (use (reg:SI FPSCR_MODES_REG))]
   "TARGET_FPU_DOUBLE && ! TARGET_FPU_SINGLE"
   "jsr    @%1%#"
   [(set_attr "type" "sfunc")
@@ -2674,8 +2674,8 @@
    (clobber (reg:DF DR0_REG))
    (clobber (reg:DF DR2_REG))
    (clobber (reg:SI FPSCR_STAT_REG))
-   (use (reg:SI FPSCR_MODES_REG))
-   (use (match_operand:SI 1 "arith_reg_operand" "r"))]
+   (use (match_operand:SI 1 "arith_reg_operand" "r"))
+   (use (reg:SI FPSCR_MODES_REG))]
   "TARGET_FPU_DOUBLE && ! TARGET_FPU_SINGLE"
   "jsr    @%1%#"
   [(set_attr "type" "sfunc")