[Bug rtl-optimization/67145] [6 Regression] associativity from pseudo-reg ordering

[ysrumyan at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145

--- Comment #4 from Yuri Rumyantsev <ysrumyan at gmail dot com> ---
I attached simple non-tested patch which restores performance on x86. This
change is no perfect but using it I noticed 2%-6% speed-up on 32-bit x86
platform. The idea of patch is very simple - we do not bail out if nothing
changed but re-materialize all PLUS rtx-instructions with register-operand. It
is important since an order of the operands in ops is different, i.e. if we
have  x + y + z on function entry, ops is {x,z,y} if REG(x) < REG(z) < REG(y).