[Bug rtl-optimization/68991] -O3 generates misaligned xorv4si3
hjl.tools at gmail dot com
gcc-bugzilla@gcc.gnu.org
Fri Dec 18 23:56:00 GMT 2015
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68991
H.J. Lu <hjl.tools at gmail dot com> changed:
What |Removed |Added
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CC| |ienkovich at gcc dot gnu.org,
| |kirill.yukhin at intel dot com
--- Comment #2 from H.J. Lu <hjl.tools at gmail dot com> ---
This may be a latent bug. SSE patterns like
(define_expand "<code><mode>3<mask_name>"
[(set (match_operand:VF_128_256 0 "register_operand")
(any_logic:VF_128_256
(match_operand:VF_128_256 1 "nonimmediate_operand")
(match_operand:VF_128_256 2 "nonimmediate_operand")))]
"TARGET_SSE && <mask_avx512vl_condition>"
"ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
can't use nonimmediate_operand.
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