[Bug target/68543] [AArch64] Implement overflow arithmetic standard names {u,}{add,sub,mul}v4<mode> and/or negv3<mode>

[ktkachov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68543

--- Comment #3 from ktkachov at gcc dot gnu.org ---
After some discussion on IRC, WORD_REGISTER_OPERATIONS seems wrong for aarch64
since 32-bit operations i.e. in SImode operate like normal 32-bit operations
because they use the 32-bit W-form of the registers. Thus they don't behave
like word_mode operations, because word_mode is DImode on aarch64.
So we may want to look at implementing the standard names after all