[Bug target/68651] New: [5/6 Regression][AArch64] Missing combination of shift-by-one with other arithmetic patterns with -mcpu=cortex-a53
ktkachov at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Wed Dec 2 09:19:00 GMT 2015
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68651
Bug ID: 68651
Summary: [5/6 Regression][AArch64] Missing combination of
shift-by-one with other arithmetic patterns with
-mcpu=cortex-a53
Product: gcc
Version: 6.0
Status: UNCONFIRMED
Keywords: missed-optimization
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: ktkachov at gcc dot gnu.org
Target Milestone: ---
Target: aarch64*
Consider the testcases:
int
foo (int x)
{
return (x * 2) & 65535;
}
int
bar (int x, int y)
{
return (x * 2) | y;
}
With GCC 4.9 for aarch64 with -O2 -mcpu=cortex-a53 we generated:
foo:
ubfiz w0, w0, 1, 15
ret
bar:
orr w0, w1, w0, lsl 1
ret
whereas with GCC 5 and trunk we fail to combine:
foo:
add w0, w0, w0
uxth w0, w0
ret
bar:
add w0, w0, w0
orr w0, w0, w1
ret
This is because of updated costs information for cortex-a53 which leads to
x * 2 being expanded as x + x rather than x << 1 and combine can't merge the
PLUS form.
This can be fixed simply by mutating the pattern during recog_for_combine in a
similar way to change_zero_ext
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