[Bug target/67366] Poor assembly generation for unaligned memory accesses on ARM v6 & v7 cpus
rearnsha at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Thu Aug 27 14:31:00 GMT 2015
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67366
--- Comment #9 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
Does that really do the right thing? That is, does force_reg understand a
misaligned memory op?
Also, what if one memory operand is aligned, but the other not? Don't we want
to have the right combination of aligned/misaligned instructions?
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