[Bug target/65710] [4.9/5 Regression] Thumb1 ICE caused by no register to spill

[evstupac at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65710

--- Comment #13 from Stupachenko Evgeny <evstupac at gmail dot com> ---
The issue reproduced with -march=corei7 as well.

Currently the hottest loop looks as following:
L1.
mov    (%esp),%ebp /* potentially redundant.  */
and    $0x7fff,%ebp                                          
movzwl 0x400(%esi,%ebp,2),%ecx                               
mov    %ecx,(%esp) 
cmp    %ecx,0x4(%esp) /*  Why not reuse ebp?  */        
jae    380                                                   
subl   $0x1,0x8(%esp)                                        
je     380                                                   
mov    (%esp),%ebp /* ebp could contain correct value (if reused above).  */
add    %edi,%ebp                                             
cmp    0x0(%ebp,%ebx,1),%al                                  
jne    L1
movzbl 0xf(%esp),%edx                                       
cmp    -0x1(%ebp,%ebx,1),%dl                               
jne    L1

Unnecessary fills and spills of ebp added.
Before the patch the loop was 2 instruction shorter.

L1.
and    $0x7fff,%edx                                             
movzwl 0x400(%esi,%edx,2),%edx                                  
cmp    %edx,0x4(%esp)                                           
jae    3c0                                                      
sub    $0x1,%ebp                                                
je     3c0                                                      
lea    (%edi,%edx,1),%ecx                                       
movzbl (%esp),%eax                                              
cmp    (%ecx,%ebx,1),%al                                        
jne    L1
movzbl 0xb(%esp),%eax                                           
cmp    -0x1(%ecx,%ebx,1),%al                                    
jne    L1.

Please let me know if you need dumps.