[Bug target/65671] New: Assembly failure (invalid register operand) with -O3 -mavx512vl
jamrial at gmail dot com
gcc-bugzilla@gcc.gnu.org
Sat Apr 4 04:57:00 GMT 2015
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65671
Bug ID: 65671
Summary: Assembly failure (invalid register operand) with -O3
-mavx512vl
Product: gcc
Version: 5.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: jamrial at gmail dot com
https://raw.githubusercontent.com/foo86/dcadec/e884d9a0d9127528bdc47c1f8db392363fb50876/libdcadec/idct_float.c
gcc -O3 -mavx512f -mavx512vl -c -o libdcadec/idct_float.o
libdcadec/idct_float.c
/tmp/cc3BQBvH.s: Assembler messages:
/tmp/cc3BQBvH.s:1602: Error: invalid register operand for `vextractf128'
/tmp/cc3BQBvH.s:1624: Error: invalid register operand for `vextractf128'
/tmp/cc3BQBvH.s:1670: Error: invalid register operand for `vextractf128'
Lines in question from the resulting assembly file
1602: vextractf128 $0x1, %ymm20, 144(%rdx)
1624: vextractf128 $0x1, %ymm24, 272(%rdx)
1670: vextractf128 $0x1, %ymm19, 400(%rdx)
GCC 5.0.0 (20150329 snapshot) on x86_64-unknown-linux-gnu. Works fine with
-mavx512f alone, so sounds like the assembler is trying to use VEX coding
scheme with the new registers instead of EVEX.
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