[Bug target/63351] Optimization: contract broadcast intrinsics when AVX512 is enabled

[kyukhin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63351

--- Comment #4 from Kirill Yukhin <kyukhin at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #1)
> ;; _7 = __builtin_ia32_pbroadcastd512_gpr_mask (b_1(D), _6, -1);
> 
> (insn 7 6 8 (set (reg:SI 101)
>         (reg/v:SI 99 [ b ])) ./include/avx512fintrin.h:3566 -1
>      (nil))
> 
> (insn 8 7 9 (set (reg:V16SI 102)
>         (subreg:V16SI (reg/v:V8DI 83 [ __Y ]) 0))
> ./include/avx512fintrin.h:3566 -1
>      (nil))
> 
> (insn 9 8 10 (set (reg:HI 103)
>         (const_int -1 [0xffffffffffffffff])) ./include/avx512fintrin.h:3566
> -1
>      (nil))
> 
> (insn 10 9 11 (set (reg:V16SI 100)
>         (vec_merge:V16SI (vec_duplicate:V16SI (reg:SI 101))
>             (reg:V16SI 102)
>             (reg:HI 103))) ./include/avx512fintrin.h:3566 -1
>      (nil))
> 
> (insn 11 10 0 (set (reg:V16SI 85 [ D.15281 ])
>         (reg:V16SI 100)) ./include/avx512fintrin.h:3566 -1
>      (nil))
> 
> which looks really awkward - or even bogus (insn 10).  What's the semantics
> of _mm512_set1_epi32?

This was generic approach when adding support for new built-ins.
Straight-forward one would add following built-ins for almost every new insn:
  res = op_built_in (x)
  res = op_built_in_mask (x, res, mask)
  res = op_built_in_mask_zero (x, mask)
Resulting up to 3 built-ins per new instruction (+ emb. rounding is also
possible).

We decided to add built-in for `op_built_in_mask' only resulting:
  res = op_built_in_mask (a, _mm512_undefined (), -1)
  res = op_built_in_mask (x, res, mask)
  res = op_built_in_mask (x, 0, mask)
relying on optimizations to use proper pattern for all 3 cases.
BTW, this is covered by tests. E.g. `__builtin_ia32_pbroadcastd512_gpr_mask'
checked in `gcc.target/i386/avx512f-vpbroadcastd-1.c'.

If compile it with `-O2' you could see that for:
   x = _mm512_set1_epi32 (z);

following assembler is generated:
        movl    z(%rip), %eax   # 5     *movsi_internal/1       [length = 7]
        vpbroadcastd    %eax, %zmm0     # 9     *avx512f_vec_dup_gprv16si      
[length = 6]
        vmovdqa64       %zmm0, x(%rip)  # 12    *movv8di_internal/3     [length
= 11]

> It seems that all of the intrinsics expand to sth weird as the above
> (the vec_merge), even _mm512_add_epi32.
> 
> I'm quite sure this doesn't make the combiners job easier.
Definitely.