[Bug target/63359] aarch64: 32bit registers in inline asm

[rearnsha at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359

--- Comment #5 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
So consider:

int f(int i){
  long x;
  asm("lsl %0, %1, 33" : "=r"(x) : "r"(i)); // lshift by more than sizeof(int)
  return x;
}

We really don't care about the top bits in i, so we don't want to extend the
value to 64 bits before we do the shift.  But we can't put "w" on the second
operand since it has to be a 64-bit register.