[Bug target/63359] New: aarch64: 32bit registers in inline asm

[glisse at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359

            Bug ID: 63359
           Summary: aarch64: 32bit registers in inline asm
           Product: gcc
           Version: 4.9.1
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: glisse at gcc dot gnu.org
            Target: aarch64-linux-gnu

int f(int i){
  asm("clz %0, %0":"+r"(i));
  return i;
}

produces:

    clz x0, x0

I need to write "clz %w0, %w0" to get the expected:

    clz w0, w0

What I would like:
1) on x86, the type of i is used to get the right register name. If this can't
be done on aarch64 (did ARM forbid it?), it may be useful to warn when I pass
the wrong type.
2) I need a documented way to get 32bit regs, and %w0 is not documented in the
gcc manual. Besides, clang rejects it, so please find a common syntax...