[Bug target/61915] [AArch64] High amounts of GP to FP register moves using LRA on AArch64

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61915

--- Comment #13 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Wilco from comment #9)
> I committed a workaround
> (http://gcc.gnu.org/ml/gcc-patches/2014-09/msg00362.html) by increasing the
> int<->fp move cost. Can you try this and check the issue has indeed gone?
> You need -mcpu=cortex-a57.

Note when I submitted ThunderX support I used a base of 2 instead of a base of
1 due to 2 being the default and all values are relative to that.  This is
mentioned in https://gcc.gnu.org/onlinedocs/gccint/Costs.html .  In fact a
value of 2 means reload will not look at the constraints of a move instruction.

So I think the cortex* cpus should also re-base these values based on 2 being
gpr-to-gpr value.