[Bug target/61915] [AArch64] High amounts of GP to FP register moves using LRA on AArch64

[wdijkstr at arm dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61915

Wilco <wdijkstr at arm dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |wdijkstr at arm dot com

--- Comment #9 from Wilco <wdijkstr at arm dot com> ---
(In reply to Evandro Menezes from comment #0)
> The issue that I observed in code size due to the default use of the LRA
> results in the spilling of the FP register used to spill variables into,
> which increases code-size.

The performance cost is a much bigger issue than codesize. The problem is that
when register pressure is high, the register allocator decides to allocate
integer liveranges to FP registers and insert int<->fp moves for every
use/define (ie. you end up with far more moves than you would if it were
spilled, so it is a bad thing even if int<->fp moves are cheap).

I committed a workaround
(http://gcc.gnu.org/ml/gcc-patches/2014-09/msg00362.html) by increasing the
int<->fp move cost. Can you try this and check the issue has indeed gone? You
need -mcpu=cortex-a57.