[Bug target/53513] [SH] Add support for fschg and fpchg insns and improve fenv support
kkojima at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Wed Oct 15 04:02:00 GMT 2014
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53513
--- Comment #25 from Kazumoto Kojima <kkojima at gcc dot gnu.org> ---
(In reply to Oleg Endo from comment #23)
> Kaz, could you please have an early look at it?
The idea looks OK to me. Build fails on sh4-linux with the patch, though.
Maybe a wrong version?
There is a typo divdf3 expand. s/gen_divdf3 /gen_divdf3_i /
- expand_df_binop (&gen_divdf3_i, operands);
+ emit_insn (gen_divdf3 (operands[0], operands[1], operands[2]));
With fixing it, yet segfaults during compiling libgcc2.c __powidf2 at
#0 0x089706b4 in sh_adjust_cost (insn=0xb7f767e0, link=0xb7f79380,
dep_insn=0xb7f762d0, cost=25) at trunk/gcc/config/sh/sh.c:10908
10908 SET_SRC (use_pat)))
(gdb) l
10903 cycle earlier. */
10904 else if (reload_completed
10905 && get_attr_dfp_comp (dep_insn) == DFP_COMP_YES
10906 && (use_pat = single_set (insn))
10907 && ! regno_use_in (REGNO (SET_DEST (single_set
(dep_insn))),
10908 SET_SRC (use_pat)))
It looks
- (use (match_operand:PSI 3 "fpscr_operand" "c"))]
+ (set (reg:SI FPSCR_STAT_REG) (const_int 0))
+ (use (reg:SI FPSCR_MODES_REG))]
breaks the assumption of sh_adjust_cost which divdf3_i has only one
set insn.
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