[Bug target/63965] [5 Regression] ICE: in extract_constrain_insn, at recog.c:2230 on ppc64

[pthaugen at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63965

--- Comment #10 from Pat Haugen <pthaugen at gcc dot gnu.org> ---
(In reply to Michael Meissner from comment #6)
> Author: meissner
> Date: Fri Nov 21 18:03:09 2014
> New Revision: 217940
> 
> URL: https://gcc.gnu.org/viewcvs?rev=217940&root=gcc&view=rev
> Log:
> 2014-11-21  Michael Meissner  <meissner@linux.vnet.ibm.com>
> 
> 	PR target/63965
> 	* config/rs6000/rs6000.c (rs6000_setup_reg_addr_masks): Do not set
> 	Altivec & -16 mask if the type is not valid for Altivec registers.
> 	(rs6000_secondary_reload_memory): Add support for ((reg + const) +
> 	reg) that occurs during push_reload processing.
> 
> 	* config/rs6000/altivec.md (altivec_mov<mode>): Add instruction
> 	alternative for moving constant vectors which are easy altivec
> 	constants to GPRs.  Set the length attribute each of the
> 	alternatives.
> 
> 
> Modified:
>     trunk/gcc/ChangeLog
>     trunk/gcc/config/rs6000/rs6000-cpus.def
>     trunk/gcc/config/rs6000/rs6000.c

Looks like the changes checked in do not match the ChangeLog comments, nor the
proposed patch from comment #4.  Revision 217940 also introduced a trunk build
problem when configuring with --with-cpu=power8.