[Bug target/62173] [5.0 regression] [AArch64] Performance regression due to r213488
jiwang at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Mon Nov 24 12:21:00 GMT 2014
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62173
--- Comment #8 from Jiong Wang <jiwang at gcc dot gnu.org> ---
while above associate virtual_stack_var_rtx with constant offset actually cause
another hidding issue.
I assume after the association, we are generating cleaner insn sequences.
given the following testcase
void bar(int i)
{
char A[10];
char B[10];
char C[10];
g(A);
g(B);
g(C);
f(A[i]);
f(B[i]);
f(C[i]);
return;
}
it will generate the following assembly
bar:
stp x29, x30, [sp, -96]!
add x29, sp, 0
stp x21, x22, [sp, 32]
add x22, x29, 48
add x21, x29, 64
stp x19, x20, [sp, 16]
sxtw x19, w0
mov x0, x22
add x20, x29, 80
bl g
mov x0, x21
bl g
mov x0, x20
bl g
ldrb w0, [x22, x19]
bl f
ldrb w0, [x21, x19]
bl f
ldrb w0, [x20, x19]
bl f
ldp x19, x20, [sp, 16]
ldp x21, x22, [sp, 32]
ldp x29, x30, [sp], 96
ret
above assembly is bad, because extra callee saved registers are used which we
should rematerialize those frame address instead of keeping them in callee
saved to avoid extra load/store.
looks like current register allocation don't rematerialize above situation.
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