[Bug target/61551] New: [NEON] alter costs to allow use of post-indexed addressing modes for VLD{2..4}/VST{2..4}

[cbaylis at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61551

            Bug ID: 61551
           Summary: [NEON] alter costs to allow use of post-indexed
                    addressing modes for VLD{2..4}/VST{2..4}
           Product: gcc
           Version: 4.10.0
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: cbaylis at gcc dot gnu.org
                CC: ramana.radhakrishnan at arm dot com
            Target: arm-unknown-linux-gnueabi

Created attachment 32967
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=32967&action=edit
test for NEON addressing modes

The attached test case demonstrates that GCC does not exploit the post-indexed
addressing mode for NEON structure loads and stores: VLDn, VSTn where n>=2.

Generated code for VLD1/VST1 (using desired post-indexed addressing)

test_ld1:
        @ args = 0, pretend = 0, frame = 0
        @ frame_needed = 0, uses_anonymous_args = 0
        @ link register save eliminated.
        vld1.8  {d16}, [r0], r1
        vst1.8  {d16}, [r0], r1
        vld1.8  {d16}, [r0], r1
        vst1.8  {d16}, [r0], r1
        vld1.8  {d16}, [r0], r1
        vst1.8  {d16}, [r0]
        bx      lr

Generated code for VLD2:
test_ld2:
        @ args = 0, pretend = 0, frame = 0
        @ frame_needed = 0, uses_anonymous_args = 0
        @ link register save eliminated.
        adds    r3, r0, r1
        vld2.8  {d16-d17}, [r0]
        adds    r0, r3, r1
        adds    r2, r0, r1
        vst2.8  {d16-d17}, [r3]
        adds    r3, r2, r1
        vld2.8  {d16-d17}, [r0]
        add     r1, r1, r3
        vst2.8  {d16-d17}, [r2]
        vld2.8  {d16-d17}, [r3]
        vst2.8  {d16-d17}, [r1]
        bx      lr


A proof of concept patch is posted at:
https://gcc.gnu.org/ml/gcc-patches/2014-06/msg01361.html