[Bug rtl-optimization/59880] Improve REE for implicit SI->DI zero-extend
jakub at gcc dot gnu.org
gcc-bugzilla@gcc.gnu.org
Sun Jan 19 17:09:00 GMT 2014
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59880
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |jakub at gcc dot gnu.org
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
But REE does the right thing here:
In *.split2 before REE we have:
(insn 218 92 219 16 (set (reg:SI 0 ax [orig:123 D.1966 ] [123])
(reg/v:SI 6 bp [orig:85 ind ] [85])) pr59880.c:77 90 {*movsi_internal}
(nil))
(insn 219 218 94 16 (set (reg:DI 0 ax [orig:123 D.1966 ] [123])
(zero_extend:DI (reg:SI 0 ax [orig:123 D.1966 ] [123]))) pr59880.c:77
132 {*zero_extendsidi2}
(nil))
and REE turns that into:
(insn 218 92 94 16 (set (reg:DI 0 ax)
(zero_extend:DI (reg/v:SI 6 bp [orig:85 ind ] [85]))) pr59880.c:77 132
{*zero_extendsidi2}
(nil))
Then split4 splits that again into:
(insn 308 92 309 21 (set (reg:SI 0 ax)
(reg/v:SI 6 bp [orig:85 ind ] [85])) pr59880.c:77 90 {*movsi_internal}
(nil))
(insn 309 308 94 21 (set (reg:DI 0 ax)
(zero_extend:DI (reg:SI 0 ax))) pr59880.c:77 132 {*zero_extendsidi2}
(nil))
and finally sched2 moves those 2 insns appart. So, this is clearly a backend
issue.
More information about the Gcc-bugs
mailing list