[Bug target/59695] bad code generation on aarch64 in aarch64_output_mi_thunk

[mgretton at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59695

mgretton at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |mgretton at gcc dot gnu.org

--- Comment #1 from mgretton at gcc dot gnu.org ---
I think the actual issue is with the code in aarch64_build_constant:

      /* zcount contains the number of additional MOVK instructions
     required if the constant is built up with an initial MOVZ instruction,
     while ncount is the number of MOVK instructions required if starting
     with a MOVN instruction.  Choose the sequence that yields the fewest
     number of instructions, preferring MOVZ instructions when they are both
     the same.  */
      if (ncount < zcount)
    {
      emit_move_insn (gen_rtx_REG (Pmode, regnum),
              GEN_INT ((~val) & 0xffff));
      tval = 0xffff;
    }
      else
    {
      emit_move_insn (gen_rtx_REG (Pmode, regnum),
              GEN_INT (val & 0xffff));
      tval = 0;
    }

The GEN_INT in the first if branch is incorrect as it truncates the immediate
at 16-bits, and so we will never generate the "MOVN" form.  What it should be
instead is: GEN_INT (~((~val) & 0xffff)) or equivalent.