[Bug middle-end/60214] New: Variables with same DECL_ASSEMBLER_NAME are treated as different variables

johannespfau at gmail dot com gcc-bugzilla@gcc.gnu.org
Sat Feb 15 19:25:00 GMT 2014


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60214

            Bug ID: 60214
           Summary: Variables with same DECL_ASSEMBLER_NAME are treated as
                    different variables
           Product: gcc
           Version: 4.8.2
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: johannespfau at gmail dot com

This bug was first found in GDC, the D frontend for GCC, but it's also
reproducable with GCC. Consider the following test case:

------------------------
int test9_1 asm ("test_эльфийские_письмена_9") = 0;
extern int test9_1_e asm ("test_эльфийские_письмена_9");

int main()
{
    test9_1 = 42;
    return test9_1_e == 42;
}
------------------------

compile on ARM with 'gcc -O2 test.c' and run the test program. It returns '0',
indicating test9_1_e is not 42. It works on ARM without optimization and on
x86_64 with or without optimization. I'm not sure if this is ARM specific or
only specific to architectures with section anchors. 'gcc -O2 test.c
-fno-section-anchors' works as expected.

What happens is that the first store to test9_1 is moved after the read from
test9_1_e.

I guess it's suspicious that test9_1_e is read directly from
test_эльфийские_письмена_9 but the store to test9_1 evolves a section anchor.

Here's the relevant generated ASM:
------------------------
ldr    r2, .L2
ldr    r3, .L2+4
ldr    r0, [r2]
mov    r2, #42
subs    r1, r0, r2
rsbs    r0, r1, #0
adcs    r0, r0, r1
str    r2, [r3]
bx    lr
[...]
.word    test_эльфийские_письмена_9
.word    .LANCHOR0
[...]
.LANCHOR0 = . + 0
    .type    test_эльфийские_письмена_9, %object
    .size    test_эльфийские_письмена_9, 4
test_эльфийские_письмена_9:
    .space    4
------------------------


In case the C code is invalid / unspecified please advise how we could get the
desired behaviour for the GDC frontend. Currently we emit the VAR_DECLS in the
same way as without the 'asm ("test_эльфийские_письмена_9")' part except we set
DECL_ASSEMBLER_NAME accordingly.


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