[Bug target/63949] Aarch64 instruction combiner does not optimize subsi_sxth function as expected (gcc.target/aarch64/extend.c fails)

[vekumar at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63949

--- Comment #4 from vekumar at gcc dot gnu.org ---
(In reply to Richard Earnshaw from comment #3)
> make_extraction is unable to generate bit-field extractions in more than one
> mode.  This causes the extractions that it does generate to be wrapped in
> subregs when SImode results are wanted.
> 
> Ideally, we should teach make_extraction to be more sensible, but I'm not
> sure what the impact of that would be on other ports that really can only
> support one mode for bit-field extracts.

Yes, make_extraction converts mult to sign extract RTL.

RTL from (mult: SI (reg: SI 1 x1 [i])
              ( constant_int 2 [0x2]))

to 

(subreg: SI (sign_extract: DI (ashift: DI (reg DI 1 x1 [i]) 
                                      (constant_int 1 [0x1]))
                              (constant_int 17 [0x11]))
            (constant_int 0 [0x0]))