[Bug target/64304] New: AArch64 miscompilation with -mgeneral-regs-only

[me at williamgrant dot id.au]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64304

            Bug ID: 64304
           Summary: AArch64 miscompilation with -mgeneral-regs-only
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: me at williamgrant dot id.au

The aarch64 target, from 4.8.0 to today's master (tested up to 4b686186), drops
an "and x0, x0, #0x7" in some integer-only code when built with
-mgeneral-regs-only. Ignoring register assignment, the only change in the
resultant code is the missing and. It works fine without -mgeneral-regs-only
and on several other targets.

This test case is quite fragile. The original code didn't need -fno-inline to
reproduce it, and the problem disappeared in an earlier test with
-fno-tree-vrp. -fdump-rtl-all reveals that the adddi vanishes between ud_dce
and combine, but I can't see any significant differences in the input RTL to
explain that.

$ gcc -mgeneral-regs-only -O2 -fno-inline -o gen-test gen-test.c
$ ./gen-test && echo success || echo fail
fail
$ gcc -O2 -fno-inline -o gen-test gen-test.c
$ ./gen-test && echo success || echo fail
success

----
unsigned char byte = 0;

void set_bit(unsigned int bit, unsigned char value) {
    unsigned char mask = (unsigned char)(1 << (bit & 7));
    if (!value) {
        byte &= (unsigned char)~mask;
    } else {
        byte |= mask;
    }
}

int main(int argc, char **argv) {
    set_bit(8, 1);
    set_bit(9, 1);
    return byte != 3;
}
----